The present invention relates generally to integrated circuits, and particularly, but not by way of limitation, to copper BEOL structures.
Chemical Mechanical Polishing (CMP) is widely used in the prior art to planarize insulating dielectrics in the top most semiconductor chip layers, i.e, those closest to the chip""s upper surface. These top most layers are sometimes called Back End Of the Line (BEOL) layers, likening the semiconductor chip manufacturing process to an assembly line where these steps occur at the back of the line. Copper is typically used to wire BEOL structures because of its good conductivity properties. However, copper suffers from poor adhesion to dielectrics and also suffers from a tendency to be degraded by electromigration.
In order to stabilize the copper surface, to enhance the adhesion of copper to dielectrics and most importantly, to reduce the tendency towards electromigration, a thin coating of a composit alloy is deposited on the copper lines. This alloy is typically a cobalt-phosphorous ternary, preferably containing W or Sn, and typically applied to about 75 to 100 xc3x85 thick.
However, during the electroless deposition process, particles of metal are generated in the bath which tend to deposit on the Cu lines and also in the (free) dielectric space in between lines. These particles can be approximately 500-2000 xc3x85 in size and they create resistance drops and even true electrical shorts causing circuit failure and decrease process yields. The present invention eliminates these loose particles by immediately following the plating cycle with a brush cleaning step which removes most of the unwanted particles, thus restoring the electrical integrity of the chip.
The main object of this invention is to provide a thin alloy metal coating (75-100 xc3x85 hick) on the Cu lines of Back-end-of-Line (BEOL) structures, after CMP, in such a way hat the Cu lines are clean and free of loose metal particles in between them to insure that the Cu circuit will not present electrical shorts. The overall invention consists of a dual process involving a) the deposition of the alloy capping layer and b) a brush cleaning step to insure the removal of free metal particles in between circuit lines.
It is known in the prior art to use solutions containing organic solvents or acids to remove unwanted metal particles. Such solutions are associated with environmental disposal problems, and are avoided by the present invention.
The invention provides a means to increase the reliability of Cu-BEOL interconnects by first providing a thin alloy coating on copper BEOL structures and removing contaminant metal particles thereby reducing the number of interline shorts.
The invention comprises a dual process involving (a) the electroless deposition of a cobalt-phosphorous ternary capping film over the CuBEOL, and (b) brush-cleaning and surfactant flotation of free metal particles from between circuit lines.
The invention comprises the steps of:
forming an array of conductors on a dielectric layer on a wafer substrate;
polishing the upper surface of said conductors so that said upper surface of the conductors is substantially co-planar with the upper surface of the dielectric layer; forming a cobalt-phosphorus-containing ternary alloy film on the upper surface of the conductors; and
brush cleaning the upper surfaces of the conductors and of the dielectric layer. The brush comprises soft polymer fibers, preferably polyvinyl alcohol and the brushing process incorporates a tincture or an aqueous solution of a surfactant.
The present invention eliminates the use of prior art solvents and acids for removing residues from semiconductor surfaces. The cleaning solution of this invention is aqueous, non flammable and DI water drain compatible (no special EPA handling is required).
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.